構文Little Endian
struct hermonprm_query_fw_st
ファイル名
構造体情報| No. | 名称 | 属性 | 説明 |
|---|---|---|---|
1 |
hermonprm_query_fw_st | Little Endian | |
| fw_rev_major[0x00010] | pseudo_bit_t | Firmware Revision - Major | |
| fw_pages[0x00010] | pseudo_bit_t | Amount of physical memory to be allocated for FW usage is in 4KByte pages. | |
| fw_rev_minor[0x00010] | pseudo_bit_t | Firmware Revision - Minor | |
| fw_rev_subminor[0x00010] | pseudo_bit_t | Firmware Sub-minor version (Patch level). | |
| cmd_interface_rev[0x00010] | pseudo_bit_t | Command Interface Interpreter Revision ID | |
| reserved0[0x00010] | pseudo_bit_t | ||
| log_max_outstanding_cmd[0x00008] | pseudo_bit_t | Log2 of the maximum number of commands the HCR can support simultaneously | |
| reserved1[0x00017] | pseudo_bit_t | ||
| dt[0x00001] | pseudo_bit_t | Debug Trace Support | |
| reserved2[0x00001] | pseudo_bit_t | ||
| ccq[0x00001] | pseudo_bit_t | CCQ support | |
| reserved3[0x00006] | pseudo_bit_t | ||
| fw_seconds[0x00008] | pseudo_bit_t | FW timestamp - seconds. Dispalyed as Hexadecimal number | |
| fw_minutes[0x00008] | pseudo_bit_t | FW timestamp - minutes. Dispalyed as Hexadecimal number | |
| fw_hour[0x00008] | pseudo_bit_t | FW timestamp - hour. Dispalyed as Hexadecimal number | |
| fw_day[0x00008] | pseudo_bit_t | FW timestamp - day. Dispalyed as Hexadecimal number | |
| fw_month[0x00008] | pseudo_bit_t | FW timestamp - month. Dispalyed as Hexadecimal number | |
| fw_year[0x00010] | pseudo_bit_t | FW timestamp - year. Dispalyed as Hexadecimal number (e.g. 0x2005) | |
| reserved4[0x00040] | pseudo_bit_t | ||
| clr_int_base_offset_h[0x00020] | pseudo_bit_t | Bits [63:32] of the Clear Interrupt registerツ痴 offset from clr_int_bar register in PCIaddress space. Points to a 64-bit regist | |
| clr_int_base_offset_l[0x00020] | pseudo_bit_t | Bits [31:0] of the Clear Interrupt registerツ痴 offset from clr_int_bar register in PCIaddress space. Points to a 64-bit registe | |
| reserved5[0x0001e] | pseudo_bit_t | ||
| clr_int_bar[0x00002] | pseudo_bit_t | PCI base address register (BAR) where clr_int register is located. | |
| reserved6[0x00020] | pseudo_bit_t | ||
| error_buf_offset_h[0x00020] | pseudo_bit_t | Read Only buffer for catastrophic error reports (bits [63:32] of offset from error_buf_bar register in PCI address space.) | |
| error_buf_offset_l[0x00020] | pseudo_bit_t | Read Only buffer for catastrophic error reports (bits [31:0] of offset from error_buf_bar register in PCI address space.) | |
| error_buf_size[0x00020] | pseudo_bit_t | Size in words | |
| reserved7[0x0001e] | pseudo_bit_t | ||
| error_buf_bar[0x00002] | pseudo_bit_t | PCI base address register (BAR) where error_buf register is located. | |
| reserved8[0x00600] | pseudo_bit_t |
目次 | ファイル一覧 | 関数一覧 | ネームスペース一覧 | クラス一覧 | #define一覧 | マクロ一覧 | 外部変数一覧 | 構造体一覧 | 共用体一覧 | 列挙体一覧 | Const一覧 | 索引 | サイドメニュー